SpaceFibre

SpaceFibre Multi-Laning Premiered at DASIA 2016

13 May 2016

Demonstration of multi-laning at DASIA 2016

STAR-Dundee has demonstrated the advanced multi-laning capabilities of the SpaceFibre protocol. This allows several lanes to operate in parallel to provide enhanced throughput. For example, with four lanes running at 2.5 Gbits/s each and aggregate throughput of 10 Gbits/s is achieved. SpaceFibre multi-laning can operate with any number of lanes, from 1 to 16. Each lane is normally bi-directional, but to support spaceflight instruments with very high-data rate in one direction and to save mass and power, it is possible to have some uni-directional lanes in a multi-lane link, provided that at least one lane is bi-directional. SpaceFibre multi-laning also supports graceful degradation in the event of a lane failure. If a lane fails, the multi-lane link will rapidly reconfigure to use the remaining lanes so that important (high priority) information can still get through. It takes a couple of microseconds for this reconfiguration to occur, which happens without loss of information. Clearly, with reduced bandwidth some information will not be sent over the link, but this will be less important, low priority, information. If a redundant lane is available in the link, it can be enabled and full capacity operation will resume. SpaceFibre IP cores and test equipment are available from STAR-Dundee. The SpaceFibre ECSS standard is due to be published by the end of 2016.

The photograph shows multi-laning capability of SpaceFibre being demonstrated to spacecraft engineers at the DASIA 2016 conference held in May in Tallinn, Estonia. A four lane link was demonstrated with low priority high bandwidth traffic flowing over some virtual channels and high priority video data over another virtual channel. Lanes were unplugged with corresponding loss in bandwidth, but the link continued to operate sending the “critical” video data without interruption. Only when all four lanes were unplugged, did the video data stream cease. As soon as any of the four lanes were plugged back in, the video stream continued once more.

STAR-Dundee Participates in Microsemi Space Forum

10 July 2015

SpaceWire/SpaceFibre Demo

STAR-Dundee is delighted to be participating in each of the Microsemi Space Forum events taking place in the United States, Europe and India over the summer of 2015. At each event we are showcasing a demonstrator we’ve developed which includes both our SpaceWire IP Core and SpaceFibre IP Core running in the new Microsemi RTG4 radiation hardened FPGA family.

The demonstrator interconnects two RTG4 development boards each featuring a STAR-Dundee FMC daughterboard specifically designed for the RTG4 boards. Each FMC board features four SpaceWire ports and two SpaceFibre ports and an aggregate bandwidth in excess of 5 Gbps. Other STAR-Dundee products are also used in the demo, such as the STAR Fire unit and the new SpaceWire Brick Mk3. One STAR Fire unit is used in interface mode as a high speed SpaceFibre data generator (2.5 Gbps) sending and receiving data through the RTG4 boards to saturate the SpaceFibre link. Another STAR Fire unit is used in analyser mode to capture data travelling over SpaceFibre between the RTG4 boards. In parallel, one computer is used as a lower speed SpaceWire source, sending data in one direction to a remote computer. At the same time, this remote computer is sending a webcam video feed through SpaceWire back to the SpaceWire source PC. A SpaceWire Brick Mk3 is used by each computer to send and receive the SpaceWire packets to/from the RTG4 boards.

All the SpaceWire data packets (SpaceWire low data rate and webcam stream) are routed over SpaceFibre virtual channels.  The rate at which these packets are transmitted is not affected by the STAR Fire high data rate packets as the bandwidth provided to a virtual channel can be configured in SpaceFibre. Thanks to its high speed together with its inbuilt Quality of Service (QoS) and Fault Detection and Isolation (FDIR) capabilities, SpaceFibre allows the reduction of system complexity, substantially reducing cable harness mass and simplifying redundancy strategies.

The embedded high-speed SerDes and the dedicated SpaceWire clock recovery circuits located inside the RTG4 FPGAs are used in the demonstration, proving that STAR-Dundee IP cores are fully compatible with Microsemi’s new RTG4 technology.